Expert in advanced device modeling (BSIM4, BSIM-Bulk, HiSIM-HV), PDK/iPDK development,
and CAD/EDA workflow automation with 7+ years at leading semiconductor companies.
A SPICE modeling and PDK development engineer with 7+ years of experience at leading semiconductor companies.
My expertise spans advanced device modeling (BSIM4, BSIM-Bulk, HiSIM-HV), PDK/iPDK development, and EDA workflow automation.
Currently based in Munich, Germany, actively seeking opportunities in semiconductor device modeling and CAD engineering.
Core Skills
Programming & Scripting
Python
Cadence SKILL
Tcl
Perl
Shell Script
C++
Verilog-A
Verilog
EDA Tools & Platforms & Simulators
Cadence Virtuoso
Siemens Tanner
Mentor Calibre
Keysight ICCAP
Keysight MBP
Proplus
HSPICE
Spectre
Semiconductor Knowledge
SPICE Models
BSIM4/BSIM-Bulk
HiSIM-HV
PDK/iPDK Development
CMOS Devices
FinFET Technology
RF Modeling
Device Physics
Work Experience
September 2023 - Present
Staff Engineer
Infineon Technologies, Neubiberg, Germany
Performed on-wafer measurements to extract characteristics of power devices
Developed and validated SPICE models (BSIM4, BSIM-Bulk, HiSIM-HV) across multiple simulators
Led technology modeling projects, managing test chip planning and cross-functional collaboration
Created an automated QA workflow, reducing model QA cycle time by 88% (12h → 1.5h)
Built an auto-centering tool to decrease model centering time
March 2020 - August 2023
Software Engineer
Siemens EDA, Hsinchu, Taiwan
Developed PDK and iPDK in Tanner tools for 5+ foundries and 10+ process nodes
Implemented front-end functionalities including callbacks and netlisting procedures
Developed back-end functionalities such as PCell development using Cadence SKILL and Python
Led TSMC iPDK conversion project, reducing development time by 50%
January 2018 - March 2020
Senior Engineer
United Microelectronics Corporation (UMC), Hsinchu, Taiwan
Built and validated SPICE models for MOSFETs, diodes, varactors, resistors, and RF devices
Contributed to model methodology development, QA flow, and model characterization documentation
Collaborated with cross-functional teams to ensure model accuracy and reliability
Mentored colleagues in modeling tasks and EDA tools usage
Education
September 2015 - August 2017
Master of Science in Electronics
National Chiao Tung University, Hsinchu, Taiwan
Research focus on Single-Photon Avalanche Diodes (SPADs) and optical crosstalk.
Published first-author papers in peer-reviewed journals.
September 2011 - June 2015
Bachelor of Science in Physics
National Taiwan Normal University, Taipei, Taiwan
Developed a strong foundation in semiconductor physics and mathematical modeling.
Publications
Crosstalk between single-photon avalanche diodes in a 0.18 µm high-voltage CMOS process
DR Wu, CM Tsai, YH Huang, SD Lin.
Journal of Lightwave Technology, 2018
Time-Correlated Crosstalk Measurements Between CMOS Single-Photon Avalanche Diodes
DR Wu, CM Tsai, SD Lin.
International Conference on Optical MEMS and Nanophotonics (OMN), 2018
Single-photon avalanche diodes in 0.18-μm high-voltage CMOS technology
LD Huang, JY Wu, JP Wang, CM Tsai, YH Huang, DR Wu, SD Lin.
Optics express 25 (12), 13333-13339, 2017
CMOS single-photon avalanche diodes for light detection and ranging in strong background illumination
WS Huang, TH Liu, DR Wu, CM Tsai, SD Lin.
Proc. Solid-state Dev. Mater, 319-320, 2018
Key Projects
Automated QA Workflow
Developed a fully automated QA workflow at Infineon that generates testbenches, netlists,
and reports directly from Virtuoso, significantly improving productivity.
Python, Cadence SKILL, Virtuoso
Auto-centering tool
Built a GUI-based auto-centering tool to fit SPICE parameters to device target specifications, reducing manual centering time by 93%.
Python, Machine Learning, GUI
TSMC iPDK Development
Led the conversion of TSMC PDK to an interoperable PDK (iPDK) at Siemens EDA,
ensuring seamless integration with Siemens Tanner tools.
A Python-based parameter optimization tool designed for SkyWater 130nm PDK BSIM4 models.
Automatically centers transistor parameters (Vth0, u0, vsat) using constant current method
for threshold voltage extraction. Features both GUI and CLI modes with detailed reporting
and visualization capabilities.
A web-based circuit simulator powered by ngspice and Streamlit. Enables circuit design,
simulation, and analysis directly in the browser with an intuitive interface.
Features include interactive netlist editor, pre-built examples (RC filters, CMOS inverters, BJT amplifiers),
parametric circuit generation, and real-time waveform visualization with export capabilities.
Built with comprehensive security features including command filtering and sandboxed execution.
A comprehensive parameterized cell (PCell) library for KLayout supporting IC design components
including MOSFETs (multi-finger, dummy gates), resistors (serpentine layout),
capacitors (MIM/MOS with interdigitated structures), and inductors (rectangular spiral).
Compatible with SkyWater 130nm and GlobalFoundries 180nm processes.
Features dynamic parameter adjustment in KLayout GUI and automated GDS generation.
Currently based in Munich, Germany. I am actively seeking new opportunities in SPICE modeling,
PDK development, or CAD/EDA engineering roles. Feel free to reach out!